WinCE

In most of the discussion forums I have seen that developers are not clear about how interrupts are handled in windows ce. I am familiar with the Xscale and arm architectures. This post will not explain about how to handle or register interrupt in drivers, as it is covered in some of the previous posts. Instead how kernel manages an interrupt in windows ce 6.0. Lets start off with the concept of EXCEPTIONS in arm architectures.

There are seven types of exceptions supported by ARM:

When an exception occurs, the processor execution is halted and branches to a predefined address called exception vector. For each exception type, there is predefined exception vector, for example, exception vector for Data abort is 0x00000010 and that of reset is 0x00000000. There is also high vectors in which the exception vectors can be moved to an alternative address range(0xFFFF0000-0xFFFF001C), using bit[13] of the coprocessor 15 register 1 .

In the exception handler the banked version of register such as R14 and SPSR are used to save and restore the processor state.

Starting point for analyzing the exception handling in Windows ce for ARM architectures can be

WINCE600\PRIVATE\WINCEOS\COREOS\NK\KERNEL\ARM\exvector.s

Defenition to each of this hanlders can be found in armtrap.s (WINCE600\PRIVATE\WINCEOS\COREOS\NK\KERNEL\ARM)

This vector table will be loaded into the higher part of physical page at 0xffff0000 (same as the High vector address), along with other kernel data in ARM_HIGH structure (WINCE600\PRIVATE\WINCEOS\COREOS\NK\INC\nkarm.h)